Content Addressable Memory (CAM) is an outgrowth of Random Access memory (RAM) technology. Unlike RAMs which access a word based on its address, CAMs access a word based on its contents. A CAM stores data in a similar fashion to a conventional RAM. However, “reading” the CAM involves providing input data to be matched, then searching the CAM for a match so that the address of the match can be output. A CAM is designed such that the user supplies a data word and the CAM searches its entire memory in one-clock cycle to see if that data word is stored anywhere in it. If the data word is found, the CAM returns a list of one or more storage addresses where the word was found. The CAM can be preloaded at device start-up and rewritten during device operation.
To search the entire memory quickly, CAM employs separate match logic per each memory row. When a search key is presented by the user, each search key bit will become visible to all the match logic cells in a column at the same time. Each row of match logic cells will then perform a bit-by-bit comparison between the provided search key and the stored key in the associated memory row. Comparison results will be reduced to a binary value (e.g., 1 for match and 0 for mismatch) and are fed into a priority encoder, which finally produces the search result. Since comparisons for all the memory rows are performed in parallel, CAM achieves high-bandwidth, constant-time search performance.
CAMs, and specifically Ternary CAMs (TCAMs), are also mostly used in networking devices. They provide read and write such as normal memory, but additionally support search which will find the index of any matching data in the entire memory. A TCAM in particular can include wildcard bits which will match both one and zero. Theses wildcards can be used on both the access operations of the memory (indicating some bits of the search are “don't care”) or can be stored with the data itself (indicating some bits of the data should not be used for determining a match). When the mask bit is active (e.g., set to a logic 0 value), the ternary CAM cell is treated as storing a “don't care” (X) value, which means that all compare operations performed on the actively masked ternary CAM cell will result in a cell match condition. Thus, if a logic 0 data bit is applied to a ternary CAM cell storing an active mask bit and a logic 1 data bit, the compare operation will indicate a cell match condition. A cell match condition will also be indicated if a logic 1 data bit is applied to a ternary CAM cell storing an active mask bit and a logic 0 data bit. Therefore a TCAM can perform a partial matching. The fully parallel search provided by TCAM eases the implementation of many complex operations such as routing table lookup. Because the TCAM searches every location in memory at once, the ordering of the element in the TCAM is less important and large indexing structures can often times be entirely avoided. This parallel search directly implements the requirements of some applications (such IP-Lookup), and can serve as the building block of more searching schemes. TCAM is also used in other high-speed networking applications such as packet classification, access list control, pattern matching for intrusion detection. TCAM are also being used with network processors as a co-processor to complement the network processors in several applications such as packet classification and routing lookup.
A typical implementation of a static random access memory (SRAM) TCAM cell consists of a ternary storage containing two SRAM cells which combines ten to twelve transistors. It also has a comparison logic, which is basically a XNOR gate using four additional pass transistors. Hence very large cells size of fourteen to sixteen transistors, hence a costly device.
Unlike a RAM chip, which has simple storage cells, each individual memory bit in a fully parallel TCAM has its own associated comparison circuit to detect a match between the stored data bit and the input data bit. TCAM chips are thus considerably smaller in storage capacity than regular memory chips. Additionally, match outputs from each cell in the data word can be combined to yield a complete data word match signal. The associated additional circuitry further increases the physical size of the TCAM chip. Furthermore, CAM and TCAM as it is done today (using SRAM elements) is intrinsically volatile, meaning that the data are lost when the power is turned off. As a result, every comparison circuit needs being active on every clock cycle, resulting in large power dissipation. With a large price tag, high power and intrinsic volatility, TCAM is only used in specialized applications where searching speed cannot be accomplished using a less costly method.
A random access CAM having magnetic tunnel junction-based memory cells has been proposed in patent application WO2008/040561 by the present applicant. Here, the magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility.
Emerging memory technology and high-speed lookup-intensive applications are demanding ternary content addressable memories with large word sizes, which suffer from lower search speeds due to large cell capacitance.
European Patent EP2204814 discloses a magnetic random access memory-based ternary content addressable memory (MRAM-based TCAM) cell comprising two magnetic tunnel junctions; a distinct sense line being coupled to each magnetic tunnel junction; a second field line, and another field line orthogonal with the field line, common to the two magnetic tunnel junctions. The MRAM-based TCAM cell can store data with a high or low logic state as well as with a masked logic state.
The disclosed MRAM-based TCAM, however, cannot reliably store more than two resistance states. Moreover the MRAM-based TCAM cell using two perpendicular field lines cannot easily be made compact in size.